CP_INT_STATUS_RING2__GENERIC0_INT_STAT__SHIFT 18115 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_INT_STATUS_RING2__GENERIC0_INT_STAT__SHIFT                                                         0x1f
CP_INT_STATUS_RING2__GENERIC0_INT_STAT__SHIFT 11139 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_INT_STATUS_RING2__GENERIC0_INT_STAT__SHIFT                                                         0x1f
CP_INT_STATUS_RING2__GENERIC0_INT_STAT__SHIFT 12642 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_INT_STATUS_RING2__GENERIC0_INT_STAT__SHIFT                                                         0x1f
CP_INT_STATUS_RING2__GENERIC0_INT_STAT__SHIFT 12446 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_INT_STATUS_RING2__GENERIC0_INT_STAT__SHIFT                                                         0x1f
CP_INT_STATUS_RING2__GENERIC0_INT_STAT__SHIFT 2537 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define CP_INT_STATUS_RING2__GENERIC0_INT_STAT__SHIFT 0x0000001f
CP_INT_STATUS_RING2__GENERIC0_INT_STAT__SHIFT 1338 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define CP_INT_STATUS_RING2__GENERIC0_INT_STAT__SHIFT 0x1f
CP_INT_STATUS_RING2__GENERIC0_INT_STAT__SHIFT 1702 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_INT_STATUS_RING2__GENERIC0_INT_STAT__SHIFT 0x1f
CP_INT_STATUS_RING2__GENERIC0_INT_STAT__SHIFT 2226 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_INT_STATUS_RING2__GENERIC0_INT_STAT__SHIFT 0x1f