CP_INT_STATUS_RING2__CP_VM_DOORBELL_WR_INT_STAT__SHIFT 18100 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_INT_STATUS_RING2__CP_VM_DOORBELL_WR_INT_STAT__SHIFT                                                0xb
CP_INT_STATUS_RING2__CP_VM_DOORBELL_WR_INT_STAT__SHIFT 11124 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_INT_STATUS_RING2__CP_VM_DOORBELL_WR_INT_STAT__SHIFT                                                0xb
CP_INT_STATUS_RING2__CP_VM_DOORBELL_WR_INT_STAT__SHIFT 12627 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_INT_STATUS_RING2__CP_VM_DOORBELL_WR_INT_STAT__SHIFT                                                0xb
CP_INT_STATUS_RING2__CP_VM_DOORBELL_WR_INT_STAT__SHIFT 12431 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_INT_STATUS_RING2__CP_VM_DOORBELL_WR_INT_STAT__SHIFT                                                0xb
CP_INT_STATUS_RING2__CP_VM_DOORBELL_WR_INT_STAT__SHIFT 1674 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_INT_STATUS_RING2__CP_VM_DOORBELL_WR_INT_STAT__SHIFT 0xb
CP_INT_STATUS_RING2__CP_VM_DOORBELL_WR_INT_STAT__SHIFT 2198 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_INT_STATUS_RING2__CP_VM_DOORBELL_WR_INT_STAT__SHIFT 0xb