CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK 18089 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK                                                           0x00200000L
CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK 11114 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK                                                           0x00200000L
CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK 12617 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK                                                           0x00200000L
CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK 12421 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK                                                           0x00200000L
CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK 1655 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK 0x200000
CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK 2179 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK 0x200000