CP_INT_STATUS_RING1__GENERIC0_INT_STAT__SHIFT 18080 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_INT_STATUS_RING1__GENERIC0_INT_STAT__SHIFT                                                         0x1f
CP_INT_STATUS_RING1__GENERIC0_INT_STAT__SHIFT 11106 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_INT_STATUS_RING1__GENERIC0_INT_STAT__SHIFT                                                         0x1f
CP_INT_STATUS_RING1__GENERIC0_INT_STAT__SHIFT 12609 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_INT_STATUS_RING1__GENERIC0_INT_STAT__SHIFT                                                         0x1f
CP_INT_STATUS_RING1__GENERIC0_INT_STAT__SHIFT 12413 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_INT_STATUS_RING1__GENERIC0_INT_STAT__SHIFT                                                         0x1f
CP_INT_STATUS_RING1__GENERIC0_INT_STAT__SHIFT 2513 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define CP_INT_STATUS_RING1__GENERIC0_INT_STAT__SHIFT 0x0000001f
CP_INT_STATUS_RING1__GENERIC0_INT_STAT__SHIFT 1314 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define CP_INT_STATUS_RING1__GENERIC0_INT_STAT__SHIFT 0x1f
CP_INT_STATUS_RING1__GENERIC0_INT_STAT__SHIFT 1672 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_INT_STATUS_RING1__GENERIC0_INT_STAT__SHIFT 0x1f
CP_INT_STATUS_RING1__GENERIC0_INT_STAT__SHIFT 2196 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_INT_STATUS_RING1__GENERIC0_INT_STAT__SHIFT 0x1f