CP_INT_STATUS_RING1__CP_VM_DOORBELL_WR_INT_STAT__SHIFT 18065 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_INT_STATUS_RING1__CP_VM_DOORBELL_WR_INT_STAT__SHIFT                                                0xb
CP_INT_STATUS_RING1__CP_VM_DOORBELL_WR_INT_STAT__SHIFT 11091 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_INT_STATUS_RING1__CP_VM_DOORBELL_WR_INT_STAT__SHIFT                                                0xb
CP_INT_STATUS_RING1__CP_VM_DOORBELL_WR_INT_STAT__SHIFT 12594 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_INT_STATUS_RING1__CP_VM_DOORBELL_WR_INT_STAT__SHIFT                                                0xb
CP_INT_STATUS_RING1__CP_VM_DOORBELL_WR_INT_STAT__SHIFT 12398 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_INT_STATUS_RING1__CP_VM_DOORBELL_WR_INT_STAT__SHIFT                                                0xb
CP_INT_STATUS_RING1__CP_VM_DOORBELL_WR_INT_STAT__SHIFT 1644 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_INT_STATUS_RING1__CP_VM_DOORBELL_WR_INT_STAT__SHIFT 0xb
CP_INT_STATUS_RING1__CP_VM_DOORBELL_WR_INT_STAT__SHIFT 2168 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_INT_STATUS_RING1__CP_VM_DOORBELL_WR_INT_STAT__SHIFT 0xb