CP_INT_CNTL_RING2__TIME_STAMP_INT_ENABLE__SHIFT 18002 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_INT_CNTL_RING2__TIME_STAMP_INT_ENABLE__SHIFT                                                       0x1a
CP_INT_CNTL_RING2__TIME_STAMP_INT_ENABLE__SHIFT 11036 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_INT_CNTL_RING2__TIME_STAMP_INT_ENABLE__SHIFT                                                       0x1a
CP_INT_CNTL_RING2__TIME_STAMP_INT_ENABLE__SHIFT 12539 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_INT_CNTL_RING2__TIME_STAMP_INT_ENABLE__SHIFT                                                       0x1a
CP_INT_CNTL_RING2__TIME_STAMP_INT_ENABLE__SHIFT 12343 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_INT_CNTL_RING2__TIME_STAMP_INT_ENABLE__SHIFT                                                       0x1a
CP_INT_CNTL_RING2__TIME_STAMP_INT_ENABLE__SHIFT 2431 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define CP_INT_CNTL_RING2__TIME_STAMP_INT_ENABLE__SHIFT 0x0000001a
CP_INT_CNTL_RING2__TIME_STAMP_INT_ENABLE__SHIFT 1234 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define CP_INT_CNTL_RING2__TIME_STAMP_INT_ENABLE__SHIFT 0x1a
CP_INT_CNTL_RING2__TIME_STAMP_INT_ENABLE__SHIFT 1574 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_INT_CNTL_RING2__TIME_STAMP_INT_ENABLE__SHIFT 0x1a
CP_INT_CNTL_RING2__TIME_STAMP_INT_ENABLE__SHIFT 2098 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_INT_CNTL_RING2__TIME_STAMP_INT_ENABLE__SHIFT 0x1a