CP_INT_CNTL_RING2__PRIV_INSTR_INT_ENABLE__SHIFT 17999 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_INT_CNTL_RING2__PRIV_INSTR_INT_ENABLE__SHIFT                                                       0x16
CP_INT_CNTL_RING2__PRIV_INSTR_INT_ENABLE__SHIFT 11033 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_INT_CNTL_RING2__PRIV_INSTR_INT_ENABLE__SHIFT                                                       0x16
CP_INT_CNTL_RING2__PRIV_INSTR_INT_ENABLE__SHIFT 12536 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_INT_CNTL_RING2__PRIV_INSTR_INT_ENABLE__SHIFT                                                       0x16
CP_INT_CNTL_RING2__PRIV_INSTR_INT_ENABLE__SHIFT 12340 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_INT_CNTL_RING2__PRIV_INSTR_INT_ENABLE__SHIFT                                                       0x16
CP_INT_CNTL_RING2__PRIV_INSTR_INT_ENABLE__SHIFT 2425 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define CP_INT_CNTL_RING2__PRIV_INSTR_INT_ENABLE__SHIFT 0x00000016
CP_INT_CNTL_RING2__PRIV_INSTR_INT_ENABLE__SHIFT 1228 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define CP_INT_CNTL_RING2__PRIV_INSTR_INT_ENABLE__SHIFT 0x16
CP_INT_CNTL_RING2__PRIV_INSTR_INT_ENABLE__SHIFT 1568 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_INT_CNTL_RING2__PRIV_INSTR_INT_ENABLE__SHIFT 0x16
CP_INT_CNTL_RING2__PRIV_INSTR_INT_ENABLE__SHIFT 2092 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_INT_CNTL_RING2__PRIV_INSTR_INT_ENABLE__SHIFT 0x16