CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT 17967 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT                                                       0x1a
CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT 11003 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT                                                       0x1a
CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT 12506 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT                                                       0x1a
CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT 12310 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT                                                       0x1a
CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT 2407 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT 0x0000001a
CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT 1210 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT 0x1a
CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT 1544 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT 0x1a
CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT 2068 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_INT_CNTL_RING1__TIME_STAMP_INT_ENABLE__SHIFT 0x1a