CP_INT_CNTL_RING1__GFX_IDLE_INT_ENABLE_MASK 17980 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_INT_CNTL_RING1__GFX_IDLE_INT_ENABLE_MASK                                                           0x00200000L
CP_INT_CNTL_RING1__GFX_IDLE_INT_ENABLE_MASK 11015 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_INT_CNTL_RING1__GFX_IDLE_INT_ENABLE_MASK                                                           0x00200000L
CP_INT_CNTL_RING1__GFX_IDLE_INT_ENABLE_MASK 12518 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_INT_CNTL_RING1__GFX_IDLE_INT_ENABLE_MASK                                                           0x00200000L
CP_INT_CNTL_RING1__GFX_IDLE_INT_ENABLE_MASK 12322 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_INT_CNTL_RING1__GFX_IDLE_INT_ENABLE_MASK                                                           0x00200000L
CP_INT_CNTL_RING1__GFX_IDLE_INT_ENABLE_MASK 1535 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_INT_CNTL_RING1__GFX_IDLE_INT_ENABLE_MASK 0x200000
CP_INT_CNTL_RING1__GFX_IDLE_INT_ENABLE_MASK 2059 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_INT_CNTL_RING1__GFX_IDLE_INT_ENABLE_MASK 0x200000