CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK 17945 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK                                                           0x00200000L
CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK 10982 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK                                                           0x00200000L
CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK 12485 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK                                                           0x00200000L
CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK 12289 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK                                                           0x00200000L
CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK 1505 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK 0x200000
CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK 2029 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK 0x200000