CP_HQD_SEMA_CMD__RESULT__SHIFT 20293 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_HQD_SEMA_CMD__RESULT__SHIFT                                                                        0x1
CP_HQD_SEMA_CMD__RESULT__SHIFT 12979 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_HQD_SEMA_CMD__RESULT__SHIFT                                                                        0x1
CP_HQD_SEMA_CMD__RESULT__SHIFT 14305 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_HQD_SEMA_CMD__RESULT__SHIFT                                                                        0x1
CP_HQD_SEMA_CMD__RESULT__SHIFT 14170 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_HQD_SEMA_CMD__RESULT__SHIFT                                                                        0x1
CP_HQD_SEMA_CMD__RESULT__SHIFT 3414 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define CP_HQD_SEMA_CMD__RESULT__SHIFT 0x1
CP_HQD_SEMA_CMD__RESULT__SHIFT 4048 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_HQD_SEMA_CMD__RESULT__SHIFT 0x1
CP_HQD_SEMA_CMD__RESULT__SHIFT 4570 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_HQD_SEMA_CMD__RESULT__SHIFT 0x1