CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR__SHIFT 20181 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR__SHIFT                                                             0x12
CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR__SHIFT 12875 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR__SHIFT                                                             0x19
CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR__SHIFT 14201 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR__SHIFT                                                             0x19
CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR__SHIFT 14066 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR__SHIFT                                                             0x19
CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR__SHIFT 3968 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR__SHIFT 0x19
CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR__SHIFT 4490 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR__SHIFT 0x19