CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT 20323 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT                                                                     0x4
CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT 13005 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT                                                                     0x4
CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT 14331 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT                                                                     0x4
CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT 14196 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT                                                                     0x4
CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT 4068 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT 0x4
CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT 4590 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_HQD_HQ_STATUS0__RSV_6_4__SHIFT 0x4