CP_HQD_HQ_STATUS0__RSVR_31_10_MASK 4075 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_HQD_HQ_STATUS0__RSVR_31_10_MASK 0xfffffc00
CP_HQD_HQ_STATUS0__RSVR_31_10_MASK 4597 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_HQD_HQ_STATUS0__RSVR_31_10_MASK 0xfffffc00