CP_HPD_STATUS0__QUEUE_STATE_MASK 20049 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_HPD_STATUS0__QUEUE_STATE_MASK                                                                      0x0000001FL
CP_HPD_STATUS0__QUEUE_STATE_MASK 12746 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_HPD_STATUS0__QUEUE_STATE_MASK                                                                      0x0000001FL
CP_HPD_STATUS0__QUEUE_STATE_MASK 14072 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_HPD_STATUS0__QUEUE_STATE_MASK                                                                      0x0000001FL
CP_HPD_STATUS0__QUEUE_STATE_MASK 13937 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_HPD_STATUS0__QUEUE_STATE_MASK                                                                      0x0000001FL
CP_HPD_STATUS0__QUEUE_STATE_MASK 3877 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_HPD_STATUS0__QUEUE_STATE_MASK 0x1f
CP_HPD_STATUS0__QUEUE_STATE_MASK 4399 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_HPD_STATUS0__QUEUE_STATE_MASK 0x1f