CP_CPC_STATUS__ROQ1_BUSY__SHIFT 6003 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_CPC_STATUS__ROQ1_BUSY__SHIFT 0x6 CP_CPC_STATUS__ROQ1_BUSY__SHIFT 583 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_CPC_STATUS__ROQ1_BUSY__SHIFT 0x6 CP_CPC_STATUS__ROQ1_BUSY__SHIFT 482 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_CPC_STATUS__ROQ1_BUSY__SHIFT 0x6 CP_CPC_STATUS__ROQ1_BUSY__SHIFT 471 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_CPC_STATUS__ROQ1_BUSY__SHIFT 0x6 CP_CPC_STATUS__ROQ1_BUSY__SHIFT 1994 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define CP_CPC_STATUS__ROQ1_BUSY__SHIFT 0x6 CP_CPC_STATUS__ROQ1_BUSY__SHIFT 2528 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_CPC_STATUS__ROQ1_BUSY__SHIFT 0x6 CP_CPC_STATUS__ROQ1_BUSY__SHIFT 3050 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_CPC_STATUS__ROQ1_BUSY__SHIFT 0x6