CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT 6052 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT                                                              0xc
CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT  622 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT                                                              0xc
CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT  521 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT                                                              0xc
CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT  510 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT                                                              0xc
CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT 2038 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT 0xc
CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT 2570 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT 0xc
CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT 3092 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT 0xc