CP_COHER_CNTL__TCL1_ACTION_ENA__SHIFT 27239 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_COHER_CNTL__TCL1_ACTION_ENA__SHIFT                                                                 0x16
CP_COHER_CNTL__TCL1_ACTION_ENA__SHIFT 19423 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_COHER_CNTL__TCL1_ACTION_ENA__SHIFT                                                                 0x16
CP_COHER_CNTL__TCL1_ACTION_ENA__SHIFT 20756 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_COHER_CNTL__TCL1_ACTION_ENA__SHIFT                                                                 0x16
CP_COHER_CNTL__TCL1_ACTION_ENA__SHIFT 20683 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_COHER_CNTL__TCL1_ACTION_ENA__SHIFT                                                                 0x16
CP_COHER_CNTL__TCL1_ACTION_ENA__SHIFT 2157 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define CP_COHER_CNTL__TCL1_ACTION_ENA__SHIFT 0x00000016
CP_COHER_CNTL__TCL1_ACTION_ENA__SHIFT 2626 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define CP_COHER_CNTL__TCL1_ACTION_ENA__SHIFT 0x16
CP_COHER_CNTL__TCL1_ACTION_ENA__SHIFT 3192 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_COHER_CNTL__TCL1_ACTION_ENA__SHIFT 0x16
CP_COHER_CNTL__TCL1_ACTION_ENA__SHIFT 3714 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_COHER_CNTL__TCL1_ACTION_ENA__SHIFT 0x16