CPM_CONTROL__L1_PWR_GATE_ENABLE_MASK 56028 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define CPM_CONTROL__L1_PWR_GATE_ENABLE_MASK                                                                  0x00000004L
CPM_CONTROL__L1_PWR_GATE_ENABLE_MASK 44507 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define CPM_CONTROL__L1_PWR_GATE_ENABLE_MASK                                                                  0x00000004L