CPM_CONTROL__L1_2_PWR_GATE_ENABLE_MASK 56030 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define CPM_CONTROL__L1_2_PWR_GATE_ENABLE_MASK                                                                0x00000010L
CPM_CONTROL__L1_2_PWR_GATE_ENABLE_MASK 44509 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define CPM_CONTROL__L1_2_PWR_GATE_ENABLE_MASK                                                                0x00000010L