CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT 18798 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT                                                         0xf
CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT 11850 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT                                                         0xf
CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT 13302 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT                                                         0xf
CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT 13080 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT                                                         0xf
CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT 1926 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT 0xf
CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT 2448 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE__SHIFT 0xf