CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK 18811 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK                                                           0x00008000L
CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK 11863 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK                                                           0x00008000L
CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK 13315 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK                                                           0x00008000L
CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK 13093 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK                                                           0x00008000L
CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK 1925 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK 0x8000
CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK 2447 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CPC_INT_CNTL__SUA_VIOLATION_INT_ENABLE_MASK 0x8000