CORB_SIZE__CORB_SIZE_CAPABILITY__SHIFT 12598 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define CORB_SIZE__CORB_SIZE_CAPABILITY__SHIFT 0x4
CORB_SIZE__CORB_SIZE_CAPABILITY__SHIFT 12604 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define CORB_SIZE__CORB_SIZE_CAPABILITY__SHIFT 0x4
CORB_SIZE__CORB_SIZE_CAPABILITY__SHIFT 13220 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define CORB_SIZE__CORB_SIZE_CAPABILITY__SHIFT 0x4
CORB_SIZE__CORB_SIZE_CAPABILITY__SHIFT 56064 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define CORB_SIZE__CORB_SIZE_CAPABILITY__SHIFT                                                                0x4
CORB_SIZE__CORB_SIZE_CAPABILITY__SHIFT 11496 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define CORB_SIZE__CORB_SIZE_CAPABILITY__SHIFT 0x4
CORB_SIZE__CORB_SIZE_CAPABILITY__SHIFT  939 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define CORB_SIZE__CORB_SIZE_CAPABILITY__SHIFT                                                                0x4
CORB_SIZE__CORB_SIZE_CAPABILITY__SHIFT 59129 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define CORB_SIZE__CORB_SIZE_CAPABILITY__SHIFT                                                                0x4