CONFIG_F0_BASE__F0_BASE__SHIFT  387 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define CONFIG_F0_BASE__F0_BASE__SHIFT 0x00000000
CONFIG_F0_BASE__F0_BASE__SHIFT   74 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define CONFIG_F0_BASE__F0_BASE__SHIFT 0x0
CONFIG_F0_BASE__F0_BASE__SHIFT   84 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define CONFIG_F0_BASE__F0_BASE__SHIFT 0x0
CONFIG_F0_BASE__F0_BASE__SHIFT   76 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_sh_mask.h #define CONFIG_F0_BASE__F0_BASE__SHIFT 0x0