CONFIG_1KB_ROW_OPT   70 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT  560 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT  645 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT 5132 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT 5144 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT   70 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT 5196 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT 5730 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT 6289 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT   70 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT  560 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT  255 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT  956 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT  369 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT  113 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT  120 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT  120 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT  117 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT  560 drivers/gpu/drm/amd/include/asic_reg/smu/smu_8_0_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT   83 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT  573 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,
CONFIG_1KB_ROW_OPT 20859 drivers/gpu/drm/amd/include/navi10_enum.h CONFIG_1KB_ROW_OPT                       = 0x00000004,
CONFIG_1KB_ROW_OPT 1270 drivers/gpu/drm/amd/include/vega10_enum.h CONFIG_1KB_ROW_OPT                       = 0x00000004,
CONFIG_1KB_ROW_OPT  560 sound/soc/amd/include/acp_2_2_enum.h 	CONFIG_1KB_ROW_OPT                               = 0x4,