COMMAND__SERR_EN__SHIFT  856 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define COMMAND__SERR_EN__SHIFT 0x8
COMMAND__SERR_EN__SHIFT 1052 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define COMMAND__SERR_EN__SHIFT 0x8
COMMAND__SERR_EN__SHIFT  960 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_sh_mask.h #define COMMAND__SERR_EN__SHIFT 0x8
COMMAND__SERR_EN__SHIFT   39 drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_sh_mask.h #define COMMAND__SERR_EN__SHIFT                                                                               0x8
COMMAND__SERR_EN__SHIFT 3045 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_sh_mask.h #define COMMAND__SERR_EN__SHIFT                                                                               0x8