COL_MAN_DISABLE_MULTIPLE_UPDATE  559 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_enum.h typedef enum COL_MAN_DISABLE_MULTIPLE_UPDATE {
COL_MAN_DISABLE_MULTIPLE_UPDATE  562 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_enum.h } COL_MAN_DISABLE_MULTIPLE_UPDATE;
COL_MAN_DISABLE_MULTIPLE_UPDATE 3496 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h typedef enum COL_MAN_DISABLE_MULTIPLE_UPDATE {
COL_MAN_DISABLE_MULTIPLE_UPDATE 3499 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h } COL_MAN_DISABLE_MULTIPLE_UPDATE;
COL_MAN_DISABLE_MULTIPLE_UPDATE 3984 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h typedef enum COL_MAN_DISABLE_MULTIPLE_UPDATE {
COL_MAN_DISABLE_MULTIPLE_UPDATE 3987 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h } COL_MAN_DISABLE_MULTIPLE_UPDATE;
COL_MAN_DISABLE_MULTIPLE_UPDATE 8667 drivers/gpu/drm/amd/include/vega10_enum.h typedef enum COL_MAN_DISABLE_MULTIPLE_UPDATE {
COL_MAN_DISABLE_MULTIPLE_UPDATE 8670 drivers/gpu/drm/amd/include/vega10_enum.h } COL_MAN_DISABLE_MULTIPLE_UPDATE;