CNVC_CUR1_CURSOR0_CONTROL__CUR0_PIX_INV_MODE_MASK 17816 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define CNVC_CUR1_CURSOR0_CONTROL__CUR0_PIX_INV_MODE_MASK                                                     0x00000004L
CNVC_CUR1_CURSOR0_CONTROL__CUR0_PIX_INV_MODE_MASK 14748 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define CNVC_CUR1_CURSOR0_CONTROL__CUR0_PIX_INV_MODE_MASK                                                     0x00000004L