CNVC_CUR1_CURSOR0_CONTROL__CUR0_ENABLE_MASK 14334 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define CNVC_CUR1_CURSOR0_CONTROL__CUR0_ENABLE_MASK                                                           0x00000001L
CNVC_CUR1_CURSOR0_CONTROL__CUR0_ENABLE_MASK 17814 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define CNVC_CUR1_CURSOR0_CONTROL__CUR0_ENABLE_MASK                                                           0x00000001L
CNVC_CUR1_CURSOR0_CONTROL__CUR0_ENABLE_MASK 14746 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define CNVC_CUR1_CURSOR0_CONTROL__CUR0_ENABLE_MASK                                                           0x00000001L