CNVC_CFG3_FORMAT_CONTROL__CLAMP_POSITIVE_MASK 21466 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define CNVC_CFG3_FORMAT_CONTROL__CLAMP_POSITIVE_MASK                                                         0x00010000L
CNVC_CFG3_FORMAT_CONTROL__CLAMP_POSITIVE_MASK 18398 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define CNVC_CFG3_FORMAT_CONTROL__CLAMP_POSITIVE_MASK                                                         0x00010000L