CNVC_CFG3_FORMAT_CONTROL__CLAMP_POSITIVE_C_MASK 21467 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define CNVC_CFG3_FORMAT_CONTROL__CLAMP_POSITIVE_C_MASK                                                       0x00020000L
CNVC_CFG3_FORMAT_CONTROL__CLAMP_POSITIVE_C_MASK 18399 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define CNVC_CFG3_FORMAT_CONTROL__CLAMP_POSITIVE_C_MASK                                                       0x00020000L