CNVC_CFG0_FORMAT_CONTROL__ALPHA_EN__SHIFT 12734 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define CNVC_CFG0_FORMAT_CONTROL__ALPHA_EN__SHIFT                                                             0x8
CNVC_CFG0_FORMAT_CONTROL__ALPHA_EN__SHIFT 15878 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define CNVC_CFG0_FORMAT_CONTROL__ALPHA_EN__SHIFT                                                             0x8
CNVC_CFG0_FORMAT_CONTROL__ALPHA_EN__SHIFT 12810 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define CNVC_CFG0_FORMAT_CONTROL__ALPHA_EN__SHIFT                                                             0x8