CM3_CM_MEM_PWR_STATUS__SHARED_MEM_PWR_STATE__SHIFT 18652 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define CM3_CM_MEM_PWR_STATUS__SHARED_MEM_PWR_STATE__SHIFT                                                    0x0
CM3_CM_MEM_PWR_STATUS__SHARED_MEM_PWR_STATE__SHIFT 22618 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define CM3_CM_MEM_PWR_STATUS__SHARED_MEM_PWR_STATE__SHIFT                                                    0x0
CM3_CM_MEM_PWR_STATUS__SHARED_MEM_PWR_STATE__SHIFT 19550 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define CM3_CM_MEM_PWR_STATUS__SHARED_MEM_PWR_STATE__SHIFT                                                    0x0