CM1_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS_MASK 18898 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define CM1_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS_MASK                                                         0x00000040L
CM1_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS_MASK 15830 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define CM1_CM_MEM_PWR_CTRL__BLNDGAM_MEM_PWR_DIS_MASK                                                         0x00000040L