CM1_CM_ICSC_B_C33_C34__CM_ICSC_B_C33__SHIFT 18136 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define CM1_CM_ICSC_B_C33_C34__CM_ICSC_B_C33__SHIFT                                                           0x0
CM1_CM_ICSC_B_C33_C34__CM_ICSC_B_C33__SHIFT 15068 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define CM1_CM_ICSC_B_C33_C34__CM_ICSC_B_C33__SHIFT                                                           0x0