CM1_CM_ICSC_B_C31_C32__CM_ICSC_B_C31__SHIFT 18131 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define CM1_CM_ICSC_B_C31_C32__CM_ICSC_B_C31__SHIFT                                                           0x0
CM1_CM_ICSC_B_C31_C32__CM_ICSC_B_C31__SHIFT 15063 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define CM1_CM_ICSC_B_C31_C32__CM_ICSC_B_C31__SHIFT                                                           0x0