CM0_CM_ICSC_B_C11_C12__CM_ICSC_B_C12__SHIFT 16253 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define CM0_CM_ICSC_B_C11_C12__CM_ICSC_B_C12__SHIFT                                                           0x10
CM0_CM_ICSC_B_C11_C12__CM_ICSC_B_C12__SHIFT 13185 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define CM0_CM_ICSC_B_C11_C12__CM_ICSC_B_C12__SHIFT                                                           0x10