CM0_CM_ICSC_B_C11_C12__CM_ICSC_B_C11__SHIFT 16252 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define CM0_CM_ICSC_B_C11_C12__CM_ICSC_B_C11__SHIFT                                                           0x0
CM0_CM_ICSC_B_C11_C12__CM_ICSC_B_C11__SHIFT 13184 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define CM0_CM_ICSC_B_C11_C12__CM_ICSC_B_C11__SHIFT                                                           0x0