CLK_RESET_PLLP_BASE   36 arch/arm/mach-tegra/sleep-tegra20.S #define CLK_RESET_PLLP_BASE		0xa0
CLK_RESET_PLLP_BASE   52 arch/arm/mach-tegra/sleep-tegra30.S #define CLK_RESET_PLLP_BASE		0xa0