CLK_BASE__INST5_SEG1  338 drivers/gpu/drm/amd/include/arct_ip_offset.h #define CLK_BASE__INST5_SEG1                       0x0001B200
CLK_BASE__INST5_SEG1  219 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define CLK_BASE__INST5_SEG1                       0
CLK_BASE__INST5_SEG1  268 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define CLK_BASE__INST5_SEG1                       0x0240BC00
CLK_BASE__INST5_SEG1  268 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define CLK_BASE__INST5_SEG1                       0x0240BC00
CLK_BASE__INST5_SEG1  345 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define CLK_BASE__INST5_SEG1                       0
CLK_BASE__INST5_SEG1  246 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define CLK_BASE__INST5_SEG1                       0