CLK_BASE__INST5_SEG0  337 drivers/gpu/drm/amd/include/arct_ip_offset.h #define CLK_BASE__INST5_SEG0                       0x00013720
CLK_BASE__INST5_SEG0  218 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define CLK_BASE__INST5_SEG0                       0
CLK_BASE__INST5_SEG0  267 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define CLK_BASE__INST5_SEG0                       0x00017E00
CLK_BASE__INST5_SEG0  267 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define CLK_BASE__INST5_SEG0                       0x00017E00
CLK_BASE__INST5_SEG0  344 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define CLK_BASE__INST5_SEG0                       0
CLK_BASE__INST5_SEG0  245 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define CLK_BASE__INST5_SEG0                       0