CLK_BASE__INST3_SEG1  324 drivers/gpu/drm/amd/include/arct_ip_offset.h #define CLK_BASE__INST3_SEG1                       0x00017200
CLK_BASE__INST3_SEG1  205 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define CLK_BASE__INST3_SEG1                       0
CLK_BASE__INST3_SEG1  256 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define CLK_BASE__INST3_SEG1                       0x02402400
CLK_BASE__INST3_SEG1  256 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define CLK_BASE__INST3_SEG1                       0x02402400
CLK_BASE__INST3_SEG1  333 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define CLK_BASE__INST3_SEG1                       0
CLK_BASE__INST3_SEG1 1224 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define CLK_BASE__INST3_SEG1                      0
CLK_BASE__INST3_SEG1  232 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define CLK_BASE__INST3_SEG1                       0