CLK_BASE__INST1_SEG0  309 drivers/gpu/drm/amd/include/arct_ip_offset.h #define CLK_BASE__INST1_SEG0                       0x000120E0
CLK_BASE__INST1_SEG0  190 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define CLK_BASE__INST1_SEG0                       0
CLK_BASE__INST1_SEG0  243 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define CLK_BASE__INST1_SEG0                       0x00016E00
CLK_BASE__INST1_SEG0  243 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define CLK_BASE__INST1_SEG0                       0x00016E00
CLK_BASE__INST1_SEG0  320 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define CLK_BASE__INST1_SEG0                       0
CLK_BASE__INST1_SEG0 1211 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define CLK_BASE__INST1_SEG0                      0x00016E00
CLK_BASE__INST1_SEG0  217 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define CLK_BASE__INST1_SEG0                       0