CG_THERMAL_INT_CTRL__THERM_GNB_HW_ENA_MASK 2925 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h #define CG_THERMAL_INT_CTRL__THERM_GNB_HW_ENA_MASK 0x10000000
CG_THERMAL_INT_CTRL__THERM_GNB_HW_ENA_MASK 4055 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define CG_THERMAL_INT_CTRL__THERM_GNB_HW_ENA_MASK 0x10000000
CG_THERMAL_INT_CTRL__THERM_GNB_HW_ENA_MASK 4045 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define CG_THERMAL_INT_CTRL__THERM_GNB_HW_ENA_MASK 0x10000000
CG_THERMAL_INT_CTRL__THERM_GNB_HW_ENA_MASK 3261 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define CG_THERMAL_INT_CTRL__THERM_GNB_HW_ENA_MASK 0x10000000
CG_THERMAL_INT_CTRL__THERM_GNB_HW_ENA_MASK 4175 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define CG_THERMAL_INT_CTRL__THERM_GNB_HW_ENA_MASK 0x10000000
CG_THERMAL_INT_CTRL__THERM_GNB_HW_ENA_MASK 3843 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define CG_THERMAL_INT_CTRL__THERM_GNB_HW_ENA_MASK 0x10000000