CG_TACH_CTRL__TARGET_PERIOD__SHIFT 4144 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define CG_TACH_CTRL__TARGET_PERIOD__SHIFT 0x3
CG_TACH_CTRL__TARGET_PERIOD__SHIFT 4134 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define CG_TACH_CTRL__TARGET_PERIOD__SHIFT 0x3
CG_TACH_CTRL__TARGET_PERIOD__SHIFT 3352 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define CG_TACH_CTRL__TARGET_PERIOD__SHIFT 0x3
CG_TACH_CTRL__TARGET_PERIOD__SHIFT 4266 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define CG_TACH_CTRL__TARGET_PERIOD__SHIFT 0x3
CG_TACH_CTRL__TARGET_PERIOD__SHIFT 3964 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define CG_TACH_CTRL__TARGET_PERIOD__SHIFT 0x3
CG_TACH_CTRL__TARGET_PERIOD__SHIFT   39 drivers/gpu/drm/amd/include/asic_reg/thm/thm_11_0_2_sh_mask.h #define CG_TACH_CTRL__TARGET_PERIOD__SHIFT                                                                    0x3
CG_TACH_CTRL__TARGET_PERIOD__SHIFT  856 drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h #define CG_TACH_CTRL__TARGET_PERIOD__SHIFT                                                                    0x3