CG_FDO_CTRL1__FDO_PWRDNB_MASK 4127 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define CG_FDO_CTRL1__FDO_PWRDNB_MASK 0x40000000
CG_FDO_CTRL1__FDO_PWRDNB_MASK 4117 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define CG_FDO_CTRL1__FDO_PWRDNB_MASK 0x40000000
CG_FDO_CTRL1__FDO_PWRDNB_MASK 3335 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define CG_FDO_CTRL1__FDO_PWRDNB_MASK 0x40000000
CG_FDO_CTRL1__FDO_PWRDNB_MASK 4249 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define CG_FDO_CTRL1__FDO_PWRDNB_MASK 0x40000000
CG_FDO_CTRL1__FDO_PWRDNB_MASK 3947 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define CG_FDO_CTRL1__FDO_PWRDNB_MASK 0x40000000