CG_DISPLAY_GAP_CNTL__VBI_TIMER_COUNT__SHIFT 3560 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h #define CG_DISPLAY_GAP_CNTL__VBI_TIMER_COUNT__SHIFT 0x4
CG_DISPLAY_GAP_CNTL__VBI_TIMER_COUNT__SHIFT 4998 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define CG_DISPLAY_GAP_CNTL__VBI_TIMER_COUNT__SHIFT 0x4
CG_DISPLAY_GAP_CNTL__VBI_TIMER_COUNT__SHIFT 5190 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define CG_DISPLAY_GAP_CNTL__VBI_TIMER_COUNT__SHIFT 0x4
CG_DISPLAY_GAP_CNTL__VBI_TIMER_COUNT__SHIFT 4178 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define CG_DISPLAY_GAP_CNTL__VBI_TIMER_COUNT__SHIFT 0x4
CG_DISPLAY_GAP_CNTL__VBI_TIMER_COUNT__SHIFT 5298 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define CG_DISPLAY_GAP_CNTL__VBI_TIMER_COUNT__SHIFT 0x4
CG_DISPLAY_GAP_CNTL__VBI_TIMER_COUNT__SHIFT 5202 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define CG_DISPLAY_GAP_CNTL__VBI_TIMER_COUNT__SHIFT 0x4