CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT  240 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h #define CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT 0x3
CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT  230 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT 0x3
CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT  230 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT 0x3
CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT  230 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT 0x3
CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT  230 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT 0x3
CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT  256 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT 0x3