CG_CLKPIN_CNTL_2__CLK_SPARE_MASK  261 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h #define CG_CLKPIN_CNTL_2__CLK_SPARE_MASK 0xff000000
CG_CLKPIN_CNTL_2__CLK_SPARE_MASK  251 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define CG_CLKPIN_CNTL_2__CLK_SPARE_MASK 0xff000000
CG_CLKPIN_CNTL_2__CLK_SPARE_MASK  251 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define CG_CLKPIN_CNTL_2__CLK_SPARE_MASK 0xff000000
CG_CLKPIN_CNTL_2__CLK_SPARE_MASK  251 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define CG_CLKPIN_CNTL_2__CLK_SPARE_MASK 0xff000000
CG_CLKPIN_CNTL_2__CLK_SPARE_MASK  251 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define CG_CLKPIN_CNTL_2__CLK_SPARE_MASK 0xff000000
CG_CLKPIN_CNTL_2__CLK_SPARE_MASK  277 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define CG_CLKPIN_CNTL_2__CLK_SPARE_MASK 0xff000000