CGTS_CU5_TA_SQC_CTRL_REG__TA_MASK 24460 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CGTS_CU5_TA_SQC_CTRL_REG__TA_MASK                                                                     0x0000007FL
CGTS_CU5_TA_SQC_CTRL_REG__TA_MASK 25773 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CGTS_CU5_TA_SQC_CTRL_REG__TA_MASK                                                                     0x0000007FL
CGTS_CU5_TA_SQC_CTRL_REG__TA_MASK 25904 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CGTS_CU5_TA_SQC_CTRL_REG__TA_MASK                                                                     0x0000007FL